Job Duties:
Summary Support the development of research prototypes. Support design and build up signal processing testbed for research works. This involves comprehending and analysis of FPGA architecture and usage of FPGA modules. Design, develop, test, and documenting code of signal processing sub-systems on FPGA, hybrid FPGA/DSP, or other hardware/software platforms in a real-time multithread operating system environment. Debugging and resolving FPGA component interfaces to relevant hardware. Integrate the sub-system designs into baseline code. Major Duties: 1. Support Research and Development (R&D) work in signal processing and wireless communications. 2. Support development of research prototypes. 3. Design and develop HW and SW/Firmware to meet product and sub-system requirements. Work with other department or outsource partners to develop and integrate sub-system deliverables. 4. Algorithm design, development, test, verify, and documenting of signal processing sub-systems on FPGA, hybrid FPGA/DSP, and other hardware/software platforms. 5. Design and build up signal processing research testbed, integrate design modules, and devise testing methods. 6. Utilize FPGA software and embedded processor design tools.

Job Skills:
Requirements 1. MSEE with 3+ years or BSEE with at least 5 years of equivalent experiences in FPGA design and development (R&D). 2. At least 3 years experiences in Altera FPGA design and DSP/embedded programming. 3. Experience with designing and implementing high-speed signal processing sub-systems on FPGAs. 4. Experience with EDA tools and IDEs used for FPGA and embedded processor development. 5. Proficiency with Verilog and VHDL. 6. Experiences in implementation of fixed-point and floating-point arithmetics. 7. Excellent English written and verbal communication skills. 8. Ability to work within a team environment. Desirable: 1. Experience with Altera FPGA device family, Altera DSP Builder, and Altera Quartus II and its embedded IDE. 2. Experience with TI DSP device family such as C55x and TI C6x and Code Composer Studio. 3. Experience with high-speed wireless data communications products. 4. Familiarity with Matlab and Simulink environment. 5. Familiarity with Subversion version control software.